1. Field of the Invention
This invention relates to data and more particularly to compression of data.
2. Description of the Related Art
The growing gap between on-chip compute resources and the external memory system bandwidth has been an active area of research for decades. The computation throughput available on a chip continues to grow at a rate much faster than the total available off-chip I/O bandwidth. This trend is expected to continue for the foreseeable future. To date, the primary approach to addressing this gap has been the increasing use of large on-die caches. For many applications, these caches have been effective at reducing the bandwidth demands to main memory. Other applications, however, have working sets that do not fit into the on-die caches, and are significantly limited by bandwidth to off-chip memory.
Certain server-related trends, such as throughput or cloud computing, are increasing the stress on cache and main memory performance. Throughput computing is a market that is expected to see a high degree of growth in the next decade because of the increase in the number of server farms. The applications in this market are characterized as having a large number of independent threads, and, unlike high performance computing (HPC) applications, each thread is generally not compute intensive. The performance of the core is less important than the performance of the cache, memory, and I/O subsystem. For instance, cloud computing workloads typically consist of many virtualized environments—leading to large memory (and cache) footprints for these workloads.
Cache compression offers the promise of increased effective cache capacity without a corresponding increase in cache SRAM (with its associated die area and power costs). In addition, cache compression results in reduced memory bandwidth requirements for a given workload. Thus, there are power and performance advantages for cache compression. However, cache compression results in increased die area for the logic utilized for compression/decompression and increased latency due to the need to decompress the compressed cache line before use.
It would be desirable to achieve the benefits of cache compression with both reasonable compression rates and appropriate decompression latency.